- Study p ovides some of the i dust y’s fi st data o ma agi g 800 VDC safety isks a d safely adopti g ew powe a chitectu es fo AI data ce te s
- Simulatio s a d a c flash isk a alyses assessed two ep ese tative 800 VDC a chitectu es eflecti g commo desig s i fo med by i dust y leade s
- Evaluati g isks with ETAP’s adva ced softwa e a d digital twi s accu ately model fault sce a ios, suppo ti g effective p otectio st ategies at ack a d facility levels
RUEIL-MALMAISON, F a ce, Aug. 03, 2026 (GLOBE NEWSWIRE) — Sch eide Elect ic, a global e e gy tech ology leade , today a ou ced a fi st-of-its-ki d a alysis that p ovides p actical guida ce o how to assess a d ma age a c flash isk i 800 VDC powe a chitectu es. Based o deployme t sce a ios i fo med by hype scale desig patte s, the a alysis compa es two eme gi g 800 VDC a chitectu es with va yi g co figu atio s. Fi di gs demo st ate that a c flash outcomes depe d st o gly o a chitectu e, capacito placeme t, a d fault-clea i g behavio .
A key esult of the esea ch is that eve u de the most dema di g capacito -domi ated assumptio s, a c flash isk i 800 VDC systems ca be ma aged, a d i ma y cases, is compa able to typical AC systems. Additio ally, bette modeli g usi g adva ced softwa e a d digital twi s ca help accu ately po t ay a c flash isk.
The fi di gs come at a c itical time whe 800 VDC a chitectu es a e bei g adopted to suppo t de se acks i AI data ce te s. Led by NVIDIA, togethe with e e gy tech ology pa t e s such as Sch eide Elect ic, the t a sitio to 800 VDC data ce te powe i f ast uctu e will e able la ge-scale data ce te s a d AI Facto ies to suppo t 400 kW IT acks a d beyo d.
As the i dust y accele ates towa d these highe powe de sities, 800 VDC dist ibutio has eme ged as the p actical path to powe megawatt-scale acks efficie tly. At the same time, highe ope ati g voltages equi e a deepe u de sta di g of fault behavio , p otectio coo di atio , a d safe wo k p actices.
“800 VDC powe dist ibutio ep ese ts a sig ifica t shift i data ce te desig , but it also i t oduces safety co side atio s that eed to be studied exte sively,”
A c flash a alysis is al eady a sta da d p actice i AC data ce te s, but o i dust y-wide sta da d o guida ce cu e tly exists to ma age elect ical haza ds that pe so el may e cou te i co ve te -fed 800 VDC systems, maki g this latest esea ch impo ta t to evaluati g a d ma agi g a c flash haza ds, but also e su i g 800 VDC systems achieve compa able safety levels to existi g powe systems. Cu e t sta da ds a e show to ove estimate a c flash isk, whe eas Sch eide Elect ic’s simulatio a alysis demo st ates that adva ced softwa e a d digital twi s mo e accu ately model isk.
Sch eide Elect ic’s wo k establishes the fi st p actical a c flash a alysis of ack-level a d facility-level 800 VDC a chitectu es, eflecti g the majo impleme tatio paths eme gi g ac oss the i dust y. The a alysis evaluates sta da ds-based methods, t a sie t simulatio , a d system-level modeli g. The fi di gs demo st ate that existi g a c flash f amewo ks ca be applied to 800 VDC systems whe used i a a chitectu e-awa e, time-depe de t way, a d that desig choices impact outcomes:
Rack-level 800 VDC a chitectu es: I a sideca (also called powe ack) case study usi g co se vative methods a d assumptio s, esults showed i cide t e e gy well below the efe e ced 1.2 cal/cm² PPE th eshold, eve without p otectio devices.Ce t alized 800 VDC a chitectu es: The facility-level case study shows pote tial fo slightly highe i cide t e e gy tha ack-level desig s whe , agai , co side i g a co se vative, less ealistic a chitectu e with o ove cu e t p otectio . The a alysis also assesses the effect of system topology a d demo st ates how fault locatio s both upst eam a d dow st eam of eve se-blocki g diodes i flue ce back-feed, peak cu e t, a d a c flash outcomes. Whe fault co t ibutio is time-limited with sta da d p otectio devices, a c flash e e gy is educed to app op iate levels fo the wo k e vi o me ts a d ge e ally alig ed with commo AC a chitectu es.
Desig a d p otectio st ategies a e impo ta t facto s fo educi g a c flash isks i 800 VDC a chitectu es. The study shows that ove all isks emai low, a d i ma y cases a e compa able to typical AC dist ibutio . Eve with time sta da d p otectio devices, i cide t e e gy ca emai below key th esholds. The esea ch also established that:
T a sie t behavio matte s: Simulatio imp oves accu acy: Softwa e (such as t a sie t simulatio a d powe system a alysis tools) shows that simplified a c flash a alysis methods fo DC systems ofte ove estimate a c flash isk i capacito -domi ated systems. Ope ato s ca sig ifica tly educe a c flash isk by i fo mi g thei p otectio st ategy with adva ced softwa e a d digital twi s like ETAP.Desig choices educe isk:
“I dust y sta da ds emai esse tial fo a c flash a d elect ical safety, but t aditio al methods ca be ove ly co se vative because they do ot fully eflect how complex DC systems ope ate,”
This wo k builds o Sch eide Elect ic’s decades-lo g histo y of a c flash safety testi g a d bolste s its commitme t to suppo ti g the i dust y’s t a sitio to 800 VDC powe a chitectu es, which a e a c itical equi eme t fo eme gi g high-de sity ack systems bei g adopted fo AI data ce te s. Sch eide Elect ic has also pe fo med exte sive testi g o live swap powe capabilities i 800 VDC systems to e able safe mai te a ce.
The fi di gs a e ow available i a white pape titled, “DC A c Flash A alysis: A P actical Study o 800 VDC i Data Ce te s.”
A photo accompa yi g this a ou ceme t is available at https://www.globe ewswi e.com/NewsRoom/Attachme tNg/6e6fd27f-c99d-4f0f-aba4-a599a8c5b688
