CAMPBELL, Calif., April 28, 2026 (GLOBE NEWSWIRE) — IC Manage today announced major advances to GDP-AI, its industry-leading design and IP management system, to further empower teams doing custom design in Cadence Virtuoso. The enhancements span advanced staging, rapid customization, AI-assisted workflow automation, and graphical design differencing.
IC Manage GDP-AI is the industry’s highest performance, most reliable & scalable global design data & IP management system – and the de facto standard for design management for custom IC design in Virtuoso. Its C++ architecture delivers 10x to 100x faster database operations than competing systems and supports teams ranging from small groups to thousands of engineers collaborating across the global enterprise.
GDP-AI enhancements further improving analog, RF, mixed-signal, standard-cell, and memory design data management efficiency include the following:
- Staging — advanced workflow for IP block development. Engineers can create private development branches with exclusive checkouts, enabling parallelized workflows without the binary merging constraints that have traditionally forced custom IC teams into single-branch development. Full revision lineage across database copies is preserved.
- Rapid customization via user-defined plugin scripts. Teams can build and deploy custom features and business logic as Python plugins — without touching the client or server, and without system downtime or version upgrades.
- AI-driven workflow automation. Engineers can query and navigate design data in natural language, generate executable workflow scripts, get secure, real-time design data access, and pull precise answers from designs and documentation.
- Graphical design differencing. Designers can do visual comparison of schematic and layout revisions across design hierarchies, highlighting changes in connectivity, component parameters, device properties, and routing.
About GDP-AI for Cadence Virtuoso
GDP-AI brings comprehensive design and IP management to analog, RF, mixed-signal, standard-cell, and memory design teams working in Cadence Virtuoso. Integrated directly into Virtuoso ADE, Virtuoso Studio, and related environments, GDP-AI gives engineers version control, workspace management, and intuitive navigation across libraries, cell views, schematics, layouts, symbols, and simulation data.
GDP-AI combines fast hierarchical navigation with clear visibility into design state and version control across tightly coupled design objects — enabling consistent processes across large hierarchies and distributed teams. Its high-performance C++ architecture underpins atomic check-ins, real-time sync visibility, and full revision traceability.
For a more in-depth look at GDP-AI for custom IC design with Virtuoso, please visit: https://www.icmanage.com/virtuoso-design-management-custom-ic
About IC Manage
IC Manage is the leading provider of design data management software that enables unrivalled productivity for global design and verification teams. The company’s products include global design & IP management with AI-enhanced data access and automation; semiconductor IP management; high speed I/O scale out enabling hybrid cloud bursting for on-demand resource access; and real-time design & verification analytics. IC Manage technologies lead the market in performance, scalability, flexibility, security, and reliability. IC Manage customers include Altera, AMD, Infineon, Microchip, NVIDIA, Qualcomm, Samsung, Viasat, and dozens of other top semiconductor and systems companies. IC Manage is headquartered in Campbell, CA, with additional offices throughout the U.S., Asia, and Europe. For more information visit us at http://www.icmanage.com.
