GAINESVILLE, Fla., Dec. 18, 2025 (GLOBE NEWSWIRE) — The 2026 Design and Verification Conference and Exhibition (DVCon U.S.), sponsored by Accellera Systems Initiative, today announced its keynote speakers, sponsored tutorials, and workshops. DVCon U.S. will take place March 2-5, 2026, at the Hyatt Regency Santa Clara.
“We have an exciting conference ahead for attendees at our new venue,” said Xiaolin Chen, DVCon U.S. 2026 General Chair. “DVCon U.S. continues to be the must-attend event for engineers and technical leaders working at the forefront of design and verification, particularly as AI-driven technologies rapidly reshape methodologies and workflows. The conference brings together deep technical content, practical insights from real-world projects, and direct engagement with industry experts and tool providers. It’s a unique opportunity for the community to learn, share experiences, and explore emerging approaches that are shaping the future of electronic systems.”
Attendees will have the opportunity to hear from two keynote sessions:
- The Tuesday, March 3 Industry Keynote: “Verification, Validation and HW/SW Challenges with Complex Chiplet-based Systems,” will be presented by Abhi Kolpekwar, Senior Vice President, Digital Verification Technology at Siemens EDA and Jean-Marie Brunet, Senior Vice President, Hardware Assisted Verification at Siemens EDA. They will be joined by a customer co-presenter to be announced later. Verification confidence increasingly depends on how real workloads interact with complex, chiplet-based hardware and on delivering power performance KPIs at the system level in a target application environment. As AI and hyperscale systems become software-defined, system behavior emerges from firmware, operating systems, power states, performance, and workload concurrency rather than isolated RTL blocks. This shift exposes limitations in traditional, block-centric verification flows, where late-stage failures increasingly arise at hardware–software and cross-die boundaries.
This keynote will examine what has changed and why conventional verification struggles to scale or shift-left in this environment, and how connected verification—spanning simulation to emulation to prototyping —enables earlier and more continuous validation of system behavior.
- Stuart Oberman, Vice President of GPU Hardware Engineering at NVIDIA, will present the invited keynote on Wednesday, March 4, “From Pixels to Tokens: Chip Design and Verification in the Era of AI.” Oberman will explore the evolution of GPUs from graphics accelerators to highly parallel processors powering generative AI, and the profound impact this shift has on chip design and verification. As Moore’s Law slows and architectural innovation must deliver gains within tight power, thermal, and cost limits, design complexity, software content, and system heterogeneity continue to grow. Drawing on two decades of GPU development experience, Oberman will examine how design and verification methodologies are adapting to address expanding state spaces and software-driven behavior, and highlights the emerging role of AI-driven, agentic workflows in enabling first-silicon success and faster delivery of increasingly complex GPUs and SoCs.
DVCon U.S. 2026 will feature a strong lineup of tutorials and workshops addressing today’s most pressing design and verification challenges. Topics include the practical application of AI and agentic workflows across RTL design, verification, and debug; advances in GPU, SoC, and system-level verification; formal methods and CDC-RDC verification; hardware-assisted verification and emulation; and emerging standards such as Portable Stimulus, IP-XACT, and SystemVerilog mixed-signal interfaces. Together, these sessions provide attendees with hands-on guidance, real-world case studies, and insight into methodologies shaping the next generation of electronic system design.
The technical program is still being finalized. For the latest updates, visit the DVCon U.S. 2026 website.
Registration is open and advance registration rates are available through January 4, 2026. Registration for the keynotes, panel, and exhibits is free.
To view proceedings from past conferences, visit the archives site.
About DVCon
DVCon is the premier conference for discussion of the functional design and verification of electronic systems. DVCon is sponsored by Accellera Systems Initiative, an independent, not-for-profit organization dedicated to creating design and verification standards required by systems, semiconductor, intellectual property (IP), and electronic design automation (EDA) companies. For more information about Accellera, please visit http://www.accellera.org. For more information about DVCon U.S., visit the DVCon U.S. website. Follow DVCon U.S. on Facebook, LinkedIn or @dvcon_us on X or to comment, please use #dvcon_us.
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