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Home Artificial Intelligence

2025 RISC-V CON: Andes Technology Celebrates 20 Years, Bringing Together Innovators, Engineers, and Ecosystem Leaders

April 3, 2025
in Artificial Intelligence, GlobeNewswire, Web3
Reading Time: 5 mins read
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San Jose, CA, April 02, 2025 (GLOBE NEWSWIRE) — Andes Technology, a leading supplier of high-efficiency, low-power 32/64-bit RISC-V processor cores and a Founding Premier member of RISC-V International, proudly announces the Silicon Valley 2025 Andes RISC-V CON scheduled for April 29, 2025.  The in-person event will gather industry leaders, innovators, and developers to explore the latest advancements in RISC-V technology and celebrate Andes Technology’s two decades of groundbreaking innovation.

Attendees will have the opportunity to gain exclusive insights from Andes executives and prominent industry leaders, explore the latest advancements in RISC-V technology, and learn about cutting-edge projects shaping the RISC-V future. Additionally, engage and network with Andes and its valued ecosystem partners, fostering collaboration and knowledge exchange.

The 2025 RISC-V CON will feature two parallel conference tracks: The Main Conference and Exhibition, open to everyone, and the new Developer Track, designed for engineers seeking deep-dive, hands-on technical training.

For more details and to register, visit the event website

Main Conference and Exhibition

The main conference welcomes all attendees, featuring over ten sessions and speeches that cover the RISC-V market and the development of SoCs using RISC-V across AI, automotive, application processing, communications, and more. Participants will also have opportunities to network with speakers and exhibitors from over twenty sponsoring companies offering IP, software, tools, services, and products.

Highlighted Main Conference Presentations:

  • Frankwell Lin, Chairman and CEO, Andes Technology – Celebrating 20 years of driving SIP innovation and 15 years of pioneering RISC-V.
  • Dr. Charlie Su, President and CTO, Andes Technology – Provides insights on advancing modern computing with Andes RISC-V processor solutions.
  • Paul Master, Co-founder and CTO, Cornami – Presenting Fully Homomorphic Encryption, the Holy Grail.
  • Fireside chat: What’s coming in AI? – Facilitated by Charlie Cheng, Andes, Board Advisor with keynotes from:
    • Jeff Bier, Founder, Edge AI and Embedded Vision Alliance
    • Pete Warden, Founder & CEO, Useful Sensors

Developer Track – Hands-on Technical Training (Limited Seating!)

For engineers looking to gain practical insights, the Developer Track offers four in-depth sessions designed to provide hands-on experience with cutting-edge RISC-V concepts and system optimization. Attendees should bring a fully charged laptop.

  • Optimization with RISC-V Vector ISA – Understand how RISC-V Vector Extensions (RVV) enhance performance and get hands-on experience using AndeSight tools.
  • IAR Professional Tools for RISC-V – Discover how advanced debugging and functional safety tools accelerate development cycles.
  • Create Your Own RISC-V Custom Instructions – Learn to enhance RISC-V ISA with Andes’ Automated Custom Extensions (ACE) and experience hands-on instruction with Andes Copilot.
  • Unleashing the Power of Heterogeneous Computing: Optimizing Resource Utilization – Join Andes, Imagination, and Baya to explore how trace-based CPU and GPU analysis can boost compute efficiency.

Event Details

Location: DoubleTree by Hilton, San Jose, CA
Time: 8:30 – 6:00 PDT
Admission: RISC-V CON is free to attend
Registration: visit the event website

About Andes Technology

As a Founding Premier member of RISC-V International and a leader in commercial CPU IP, Andes Technology (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099) is driving the global adoption of RISC-V.  Andes’ extensive RISC-V Processor IP portfolio spans from ultra-efficient 32-bit CPUs to high-performance 64-bit Out-of-Order multiprocessor coherent clusters. 

With advanced vector processing, DSP capabilities, the powerful Andes Automated Custom Extension (ACE) framework, end-to-end AI hardware/software stack, ISO 26262 certification with full compliance, and a robust software ecosystem, Andes unlocks the full potential of RISC-V, empowering customers to accelerate innovation across AI, automotive, communications, consumer electronics, data centers, and mobile devices.  Over 16 billion Andes-powered SoCs are driving innovations globally. Discover more at www.andestech.com  and connect with Andes on LinkedIn, X , and YouTube.

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