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Home Artificial Intelligence

Astera Labs to Host Press Conference, Live Demos, and Technical Talks at Computex 2026

May 27, 2026
in Artificial Intelligence, GlobeNewswire, Web3
Reading Time: 6 mins read
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TAIPEI, Taiwan, May 26, 2026 (GLOBE NEWSWIRE) — Astera Labs, Inc. (Nasdaq: ALAB), a leader in semiconductor-based connectivity solutions for rack-scale AI infrastructure, will host press and industry analysts at Computex 2026 in the company’s room at the Taipei Nangang Exhibition Center, Hall 1 (TaiNEX 1), Room 303, third floor.

WHAT: Astera Labs will use its Computex program to highlight the company’s latest news, rack-scale AI connectivity strategy, and collaboration with leading AI platform providers and Taiwan system and manufacturing partners.

Attendees will get a look at Astera Labs’ complete connectivity portfolio, including the first public demonstration of the Scorpio™ X-Series 320 Lane Smart Fabric Switch, ultra-low latency linear optical connectivity, COSMOS-enabled rack-level validation, and production-ready systems from Astera Labs and ecosystem partners.

Demonstrations will highlight:

  • Open scale-up AI platforms built on Scorpio Fabric Switches, including MGX-based reference designs for rapid AI platform deployment.
  • Rack-scale validation for scale-up fabrics, including rigorous PCIe 6 testing with active electrical cables, CPUs and GPUs, plus rack-scale observability and diagnostics with COSMOS Explorer.
  • Copper and optical connectivity for next-generation AI infrastructure, including active electrical cables, linear optical connectivity and 200G/lane technology with high-fidelity SerDes diagnostics.
  • Silicon, validation platforms, and partner systems spotlighting how Astera Labs accelerates the customer journey from bring-up to deployment—spanning interop, performance testing, and production-ready platforms

During a featured fireside chat on Wednesday, June 3, Thad Omura, SVP and GM, Compute Connectivity Group, Astera Labs, will share insights into Astera Labs’ custom connectivity solutions.

Technical talks will include:

  • The Evolving Boundary of Copper and Optical
  • Next-Gen Retimers for AI Systems
  • Inference Tokenomics: Making Every Token Count with KV Cache Optimization
  • The New Engine Driving Frontier AI Forward
  • Streamline, Automate, & Accelerate Your Hardware Workflows with COSMOS Tools
  • Scaling 200G/Lane Ethernet: Advantages of Standard Footprint Designs

WHEN: Computex 2026: June 2-5, 2026 (all times listed are in Taipei time)

  • Press conference, demo tour, and audience Q&A: Wednesday, June 3, 10:00 a.m.-11:00 a.m.
  • Fireside Chat with Ecosystem Partner: Wednesday, June 3, 11:00 a.m.-11:30 a.m.
  • Happy hour reception: Wednesday, June 3, 3:00 p.m.-5:00 p.m.

WHERE: Taipei Nangang Exhibition Center, Hall 1 (TaiNEX 1), Room 303, Third Floor

WHO: Press and industry analysts covering AI infrastructure, hyperscale systems, and connectivity innovation.

WHY: The event is designed to give media and industry analysts direct access to Astera Labs leaders, latest announcements, live technical demonstrations, and ecosystem conversations around accelerating AI infrastructure deployment.

About Astera Labs
Astera Labs (Nasdaq: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink Fusion, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at http://www.asteralabs.com.

Forward-Looking Statements
This communication contains certain forward-looking statements regarding Astera Lab’s expectations with respect to the parties that it will host, the subject of its fireside chat and technical talks, and the matters that will be demonstrated at the Computex 2026 program, including Astera Lab’s complete connectivity portfolio (e.g., the Scorpio X-Series 320 Lane Smart Fabric Switch, optical connectivity innovation, SerDes diagnostics and COSMOS-enabled validation), features and capabilities; its rack-scale AI connectivity strategy; as well as the systems produced as part of and impact of its collaborations. Such forward-looking statements are introduced using words such as “designed,” “strategy,” “will” and variations of such words and similar expressions. Such statements involve risks and uncertainties, many of which are beyond the control of Astera Labs, that could cause actual results to differ materially from those expressed or implied in the forward-looking statements, including, among others, the risk that the expected components of the program may not occur; the anticipated market opportunities may not materialize; we may be unable to achieve, incorporate or validate the expected product features or capabilities; delays, disruptions, challenges or increased costs in the ability to incorporate product features or achieve the expected product roadmap within the expected timelines; the complexities and uncertainties in developing and implementing solutions based on new features and technologies; litigation or disputes related to our products; macroeconomic conditions, including general semiconductor industry economic conditions; regulatory restrictions; international conflict and other risks and uncertainties described in Astera Lab’s Form 10-K, Form 10-Q and other filings with the SEC.

Forward-looking statements speak only as of the date they are made. Readers are cautioned not to put undue reliance on forward-looking statements, and no person assumes any obligation to update or revise any such forward-looking statements, whether as a result of new information, future events or otherwise, except to the extent that disclosure may be required by law.

Contact:
Peter Lo
Peter.lo@asteralabs.com

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